This invention relates to an improvement in the technique of implementing circuits which make use of programmable logic arrays (PLA) and, more particularly, to those PLA circuits which are intended to fulfill functions involving recurrent processes.
It is a well-known fact that any complex logic function results from the combination of basic functions which, more particularly, make use of AND and OR functions. Bearing that in mind and taking advantage of the progress of the large scale integrated circuit technique, the manufacturers have conceived and put on the market new types of circuits, the so-called PLA's which are essentially comprised of matrices of elements fulfilling the OR and AND functions. The simplest of these circuits includes an AND matrix formed of AND circuits and an OR matrix formed of OR circuits. The inputs of the data to be processed is generally provided to the AND matrix. This matrix makes AND-type logic combinations involving the input data and the inverses (or complements) thereof. The terms issuing from this first matrix are then introduced into the OR matrix wherein they are subject to OR-type logic operations. In some applications, the desired result is, then, obtained at the output of this second matrix. But some other applications necessitate recurrent operations. In other words, the information appearing at the output of the OR matrix must be fed back into the input of the AND matrix. The final result is obtained after the carrying out of a sequential process wherein some steps involve results obtained during the execution of the immediately preceding step. In order to fulfill these functions, a buffer register or other storage means is provided at the output of the OR matrix and the output of this register is connected to the input of the AND matrix. When the operations are more complex, it may be necessary to preserve the results relative to several steps in order to be able to reintroduce them into the circuit at different given time-instants. It results therefrom that a plurality of buffer registers are necessary, and worse, the sizes of the AND and OR matrices have to be increased when conventional techniques are used.